1. Field
The present application relates to amplifiers. In particular the present application relates to gate biasing for amplifiers comprising stacked transistors which can operate in an active mode during periods of RF signal transmission, and in a standby mode during periods of non-transmission.
2. Description of Related Art
In recent years, stacked cascode amplifiers, which use a plurality of transistors arranged as a stack (stacked transistors) in an amplification stage of the amplifiers, have become predominant in radio frequency (RF) applications where high power, high voltage outputs are desired. Due to the higher number of transistors in the stack, voltage handling performance of the amplifier is increased, thereby allowing the high power, high voltage outputs. Since the stacked transistors comprise individual low voltage transistors which can tolerate a voltage substantially lower than the output voltage of the amplifier, it is important to bias the low voltage transistors of the stack so as to maintain operation within their tolerable voltage range. Such voltage compliance of the low voltage transistors of the stack must be maintained whether the amplifier operates in an active mode, transmitting a signal, or in a standby mode, not transmitting a signal. However, conflicting characteristics of a biasing circuit that provides biasing voltages to the staked transistors may exist between operation in the active mode and in the standby mode, such as, for example, an impedance presented to the gates of the transistors of the stack during the active mode of operation, and a power consumed in the biasing circuit and in the stacked transistors during the standby mode of operation.